The present invention relates to a substrate and a method for producing it. More specifically, the present invention relates to a multilayer substrate and a method for producing the multilayer substrate.
Recently, with the accelerated tendency of ubiquitous computing and digital convergence, semiconductor integrated circuits are being integrated enough to perform system functions with a single chip, the signal processing is speeding up, and less power is needed in order to fit in mobile environments. In these electronic environments, the technology to design a circuit to secure the noise margin by lowering the signal-to-noise ratio is being increasingly important. Besides, as universal electronic devices with Wireless communication become more broadband, to meet the increased amount of data communication and the demand for high-speed signal processing, products become smaller, and parts are more densely mounted to implement multi-functions, electrical features, such as signal integrity, power integrity, electromagnetic interference and electromagnetic integrity, are becoming very important.
According to conventional art, when printed circuit boards (PCBs) are stacked, the electrical signal between the stacked PCBs was connected at a specific part. That is, a module pin was brought close to an arranged plate to connect an electrical signal between PCBs. As such, when locally connecting a signal, a feedback current on the signal can be formed by a pin, adjacent to the signal line, and an electrode pattern, causing problems, such as deterioration of signal integrity and electromagnetic interference (EMI), when a high-speed signal is delivered.
The “stacked processor construction” presented in U.S. Pat. No. 6,362,974 discloses only an outline of arrangement and connection conceptually, not a specific method for connecting a signal line, thereby not being able to solve the problems of signal integrity and EMI, described above.